1. Field of the Invention
The present invention relates to a semiconductor device and a method of fabricating the same, and more particularly, to a capping layer of a metal pattern formed in a back-end process among semiconductor device fabrication processes.
2. Description of the Related Art
As the integration of semiconductor devices increases, the design rules of semiconductor devices must account for decreasing structure sizes. As the design rule decreases, the size of an individual device such as a transistor in a semiconductor device decreases also, and the process for interconnecting the individual devices via a metal interconnection becomes more important. In particular, in semiconductor devices requiring high speed operation, various attempts to reduce the resistance of the metal interconnection are being made.
Examples of such attempts to reduce the interconnection resistance include replacing the metal interconnection of aluminum (Al) with a metal interconnection of copper (Cu), using a barrier layer in a contact hole to connect the metal interconnections.
A prior art example of using a cobalt layer as the barrier layer in a contact hole is disclosed in U.S. Pat. No. 5,998,873. However, this prior art is directed not to a capping layer covering the entire surface of the metal layer, but to a cobalt layer restricted only to the inside of the contact hole.